电 话：86-574-63620701
传 真：86-574-63621610
邮 箱：support@yutai-elec.com
网 址：www.yutai-elec.com
地 址：浙江省慈溪市观海卫镇东山中路46号
The DM8806 is a fully integrated and cost-effective fast Ethernet switch controller with 5 10/100MB fast Ethernet PHY ports, 6 10/100Mb MAC, and MII/RevMII/RMII for 6th MAC.
The DM8606C is a fully integrated and cost-effective fast Ethernet switch controller with 5 10/100MB fast Ethernet PHY ports, 6 10/100Mb MAC, and MII/RevMII/RMII for 6th MAC.
The DM8603 is a fully integrated, high performance, and cost-effective three port 10M/100M Fast Ethernet switch. DM8603 consists of two PHY ports and a third port with either MII or RMII interface.
DM9006 is a 3-port switch with 2 built-in 10/100M fasr Ethernet PHYs and a third port that can interface to MCU's local bus.
DM9016 is a 4-port switch with 2 built-in 10/100M fast Ethernet PHYs, one port with MII/RMII interface, and a fourth port that can interface directly to MCU's local bus.
DM9106 is a 4-port switch with 2 built-in 10/100M fast Ethernet PHYs, one port with MII/RMII interface, and a fourth port can interface to PCI master
CS8900A 是一个适用于嵌入式应用的低成本以太网 LAN® 控制器。其高度集成的设计使得用户无需使用其他以太网控制器所需的成本高昂的外部组件。CS8900A 包含片上 RAM、10Base-T 传输和接收滤波器，以及一个带 24 mA 驱动器的直接 ISA 总线接口。除了高度集成外，CS8900A 还提供广泛的性能特点和配置选项。其独特的 PacketPage 架构可自动适应不断变化的网络流量模式以及可用的系统资源。因此大大提高了系统效率。CS8900A 提供 100 引脚 TQFP 封装，完美适用于小尺寸、注重节省成本的以太网应用。借助 CS8900A，系统工程师可以设计完整的以太网电路，该电路将占用不到 1.5 平方英寸（10 平方厘米）的电路板空间。
单芯片 IEEE 802.3 以太网解决方案
可用的软件驱动器综合套件
高效的 PacketPag™ 架构可在 I/O 和内存空间中运行，并可作为直接内存存取 (DMA) 备用设备
全双工操作
片上 RAM 缓冲器收发帧数
10Base-T 端口和滤波器（极性检测/校正）
用于 10Base-2、10Base-5 和 10Base-F 的 AUI 端口
在冲突、填充和 CRC（循环冗余检查）时自动进行重新传输
可编程接收功能
用于减少 CPU 开销的流传输
自动抑制错误的数据包
面向无跳线配置的 EEPROM 支持
面向无磁盘系统的启动 PROM 支持
边界扫描和环回测试
链接状态和 LAN 活动的 LED 驱动器
待机和暂停睡眠模式
3 V 或 5 V 运行；商业或工业温度范围
最大值为 5 V = 120 mA；典型值为 5 V = 90 mA
封装：100 引脚 TQFP；无铅组装
CS8952 采用 CMOS 技术来实现高性能、100Base-X/10Base-T 物理层 (PHY) 线路接口。它充分利用了针对抗噪和抗近端串扰 (NEXT) 优化的自适应均衡器，将接收器操作电线长度延长到 160 米以上。此外，发射电路旨在提供超低发射抖动 (<400 ps)，以便提升链接伙伴性能。以zui大限度地降低发射驱动器共模噪音，以减少 EMI（电磁干扰），以便简化 FCC 认证。CS8952 包含标准的媒体独立接口 (MII)，以便轻松连接各类 10 Mbps 和 100 Mbps 媒体访问控制器 (MAC)。CS8952 还包含一个可与 100Base-Fx 光纤互连模块搭配使用的伪-ECL（发射极耦合逻辑）接口.
用于 100Base-X 和 10Base-T 的单芯片 IEEE 802.3 物理接口 IC
借助出色的抗噪性和“下一个”边距，自适应均衡器可提供更长距离的操作 (>160 m)
超低发送抖动 (<400 ps)
在 Tx 驱动器上具有低共模噪音，以便减少 EMI
用于 10Base-T 的集成 Rx 和 Tx 滤波器
连续“Killer 数据包”补偿
支持数字接口
用于 100Base-X 和 10Base-T 的 MII
中继器 5 位代码组接口 (100Base-X)
10Base-T 串行接口
寄存器组可与 DP83840A 兼容
带下一页支持的 IEEE 802.3 自动协商
六个 LED 驱动器（LNK、COL、FDX、Tx、Rx 和 SPD）
低功耗（135 mA 典型值）CMOS 设计（5 V 电源）
The IOP (Internet Offload Processor) W7500P is the one-chip solution which integrates an ARM Cortex-M0, 128KB Flash and hardwired TCP/IP core & PHY for various embedded application platform especially requiring ‘Internet of things’.
The TCP/IP core is a market-proven hardwired TCP/IP stack with an integrated Ethernet MAC. The Hardwired TCP/IP stack supports the TCP, UDP, IPv4, ICMP, ARP, IGMP and PPPoE which has been used in various applications for years. W7500P suits best for users who need Internet connectivity for application.
The IOP (Internet Offload Processor) W7500 is the one-chip solution which integrates an ARM Cortex-M0, 128KB Flash and hardwired TCP/IP core for various embedded application platform especially requiring ‘Internet of things’.
The TCP/IP core is a market-proven hardwired TCP/IP stack with an integrated Ethernet MAC. The Hardwired TCP/IP stack supports the TCP, UDP, IPv4, ICMP, ARP, IGMP and PPPoE which has been used in various applications for years. W7500 suits best for users who need Internet connectivity for application.
iMCU W7100A is the one-chip solution which integrates an 8051 compatible micro-controller, 64KB SRAM and hardwired TCP/IP core for high performance and easy development. The TCP/IP core is a market-proven hardwired TCP/IP stack with an integrated Ethernet MAC & PHY. The Hardwired TCP/IP stack supports the TCP, UDP, IPv4, ICMP, ARP, IGMP and PPPoE which has been used in various applications for years.
W6100 is a hardwired Internet controller chip supporting IPv4/IPv6 dual stack by adding IPv6 functions on the basis of WIZnet’s patented hardwired TCP/IP core technology. W6100 supports TCP/IP protocols such as TCP, UDP, IPv6, IPv4, ICMPv6, ICMPv4, IGMP, ARP and PPPoE. W6100 also includes 10Base-T / 10Base-Te / 100Base-TX Ethernet PHY and Ethernet MAC Controller which makes it suitable for embedded internet-enabled devices.
W5100S is an embedded Ethernet controller designed as a full hardwired TCP / IP with WIZnet technology. W5100S provides internet connectivity to your embedded system by using SPI (Serial Peripheral Interface) or Parallel System BUS.
SPI and Parallel System BUS provide easy connection via external MCU to W5100S.The clock speed of W5100S SPI supports upto 70MHz and the Parallel System Bus supports higher speed network communication than SPI.
The W5500 chip is a Hardwired TCP/IP embedded Ethernet controller that enables easier internet connection for embedded systems using SPI (Serial Peripheral Interface).
W5500 suits users in need of stable internet connectivity best, using a single chip to implement TCP/IP Stack, 10/100 Ethernet MAC and PHY. Hardwired TCP/IP stack supports TCP, UDP, IPv4, ICMP, ARP, IGMP, and PPPoE, …, which has been proven through various applications over many years. W5500 uses a 32Kbytes internal buffer as its data communication memory.
The W5300 chip is a Hardwired TCP/IP embedded Ethernet controller that enables easier internet connection for embedded systems that required high network performance.
W5300 suits users in need of stable internet connectivity best, using a single chip to implement TCP/IP Stack, 10/100 Ethernet MAC and PHY. Hardwired TCP/IP stack supports TCP, UDP, IPv4, ICMP, ARP, IGMP, and PPPoE, …, which has been proven through various applications over many years. W5300 uses a 128Kbytes internal buffer as its data communication memory.
The W5200 chip is a Hardwired TCP/IP embedded Ethernet controller that enables easier Internet connection for embedded systems.
W5200 suits users in need of stable Internet connectivity best, using a single chip to implement TCP/IP Stack, 10/100 Ethernet MAC and PHY. Hardwired TCP/IP stack supports TCP, UDP, IPv4, ICMP, ARP, IGMP, and PPPoE, …, which has been proven through various applications over many years. W5200 uses a 32Kbytes internal buffer as its data communication memory.
The W5100 chip is a Hardwired TCP/IP embedded Ethernet controller that enables easier Internet connection for embedded systems.
W5100 suits users in need of stable Internet connectivity best, using a single chip to implement TCP/IP Stack, 10/100 Ethernet MAC and PHY. Hardwired TCP/IP stack supports TCP, UDP, IPv4, ICMP, ARP, IGMP, and PPPoE, …, which has been proven through various applications over many years. W5100 uses a 16ytes internal buffer as its data communication memory.
The W3150A+ chip is a Hardwired TCP/IP embedded Ethernet controller that enables easier Internet connection for embedded systems.
W3150A+ suits users in need of stable Internet connectivity best, using a single chip to implement TCP/IP Stack & 10/100 Ethernet MAC . Hardwired TCP/IP stack supports TCP, UDP, IPv4, ICMP, ARP, IGMP, and PPPoE, …, which has been proven through various applications over many years. W3150A+ uses a 16Kbytes internal buffer as its data communication memory.
An octal-port Multi-Gigabit Ethernet Transceiver compatible with both IEEE 802.3bz standard and NBASE-T Alliance specification for 2.5 Gbps and 5 Gbps operation over Cat5e cables
